The present invention relates to an aligner and, more specifically, to an aligner used for inspecting a number of semiconductor elements formed on a semiconductor wafer by one operation.
The present invention corresponds to that of Japanese Patent Application No. 10-54423 which has recently been filed by the same inventors as those of the present invention, and relates to an aligner wherein a contactor is brought into contact with a wafer holding member, which holds a semiconductor wafer, by vacuum adsorption to integrate the semiconductor wafer, contactor and wafer holding member into one piece.
In semiconductor inspection, electric characteristics of semiconductor elements (each referred to as a chip hereinafter) formed on a semiconductor wafer (referred to as a wafer hereinafter) are tested to screen defect-free chips. The defect-free chips are packaged with synthetic resin or ceramics in an assembly step. In a reliability test, a temperature stress or an electrical stress is applied to the packaged chips to detect a latent defect and the like. If a defective chip is detected, it is eliminated.
Chips are decreased in size and increased in packing density as electrical appliances become smaller and more functional. Recently various mounting techniques for making semiconductor products smaller have been developed. In particular, a technique of mounting a chip as a so-called bare chip without being packaged is developed. In order to put bare chips on the market, their quality assurance is required. For the quality-assured bare chips, they should take a reliability test to put them on the market. A probe apparatus can be used for the reliability test; however, in this case, bare chips have to be tested one by one. Since, moreover, a long time is required for testing one bare chip, the reliability test using the probe apparatus has a problem of costs. To inspect bare chips using a conventional reliability test apparatus, various difficulties such as electrical connection between a bare chip and a socket have to be resolved. Since a bare chip is small, its handling is considerably complicated and its inspection costs are increased.
A technique of conducting a reliability test on a plurality of wafers at once, is proposed in, for example, Jpn. Pat. Appln. KOKAI Publications Nos. 7-231019, 8-5666 and 8-340030.
Conventionally, in order to bring a plurality of contact terminals of a contact into contact with a plurality of chips formed on a wafer, the contact and wafer are arranged opposite to each other, and the contact terminals are visually aligned with their corresponding electrode pads of the wafer (hereinafter referred to as alignment) and brought into contact with the chips together. For this reason, a long time is required for the alignment, which reduces operation efficiency and applies a great load to an operator, thereby causing variations in alignment precision. As described above, the conventional alignment has the problem in which it is difficult to bring a plurality of contact terminals of a contactor into stable contact with a plurality of chips formed on a wafer.
In the foregoing Japanese Patent Application No. 10-54423, the inventors of the present invention proposes the following aligner as an alignment apparatus. A wafer holding member for holding a wafer by vacuum adsorption (hereinafter referred to as a wafer chuck) is moved in X, Y, Z and .theta. directions to align the wafer and contactor with each other. The contactor is then placed into contact with the wafer chuck by vacuum adsorption to integrate the contactor, wafer chuck and table into one piece. However, the aligner does not have a mechanism for checking vacuum adsorption among the wafer chuck, wafer and contactor or a mechanism for checking vacuum pressure among them. For this reason, it has recently been recognized that if the vacuum adsorption is lowered, electrical contact between the wafer and contactor becomes poor during the reliability test and, in extreme cases, the integrated wafer chuck, wafer and contactor are likely to separate from each other.